1. Field of the Invention
The present invention relates to a driving device for a liquid crystal display, and more particularly, to a driving device utilized for preventing noises of a clock signal from causing error operation of a liquid crystal display.
2. Description of the Prior Art
In a driving circuit of a liquid crystal display (LCD), a shift register is a widely employed digital logic circuit, and can sequentially provide a pulse signal to a plurality of data output terminals according to a clock signal, such that the driving circuit of the LCD can output source driving signals or gate driving signals line-by-line to drive corresponding pixels.
Please refer to FIG. 1. FIG. 1 is a functional block diagram of a gate driving circuit 10 of a conventional LCD. The gate driving circuit 10 mainly includes a shift register circuit 110 and an output buffer circuit 120. The shift register circuit 110 sequentially outputs pulse signals Q1˜Qn according to an input pulse signal DIN and a clock signal CLK. The output buffer 120 then performs operations such as voltage amplification on the pulse signals Q1˜Qn to generate gate driving signals X1˜Xn for respective scan lines. In addition, the gate driving circuit 10 further includes an output control circuit 130. The output control circuit 130 is utilized for modulating the pulse signals Q1˜Qn to avoid the adjacent gate driving signals X1˜Xn overlapping with each other according to an Output Enable (OE) signal. Detailed operations of the driving circuit are well known by those skilled in the art, and thus not further described herein.
Generally, the shift register is formed by a plurality of series connected flip-flops, and can perform operations such as data registering, delay or conversion of serial and parallel output on input binary data. Please refer to FIG. 2. FIG. 2 is a schematic diagram of a conventional shift register circuit 20. The shift register circuit 20 can be the shift register 110 in FIG. 1, and includes cascaded flip-flops FF1˜FFn. Each of the flip-flops FF1˜FFn further includes an input terminal D, an output terminal Q and a clock input terminal C, and is utilized for shifting a logic level received by the input terminal D to the output terminal Q according to a clock signal CLK received by the clock input terminal C. In common cases, the output terminal of each flip-flop is coupled to the input terminal of a next stage flip-flop. Thus, when an input signal DIN is inputted to the input terminal of the first flip-flop FF1, the shift register circuit 20 then forward transfers a logic level of the input signal DIN stage-by-stage according to the clock signal CLK, so as to output pulse signals Q1˜Qn in order. Related signal sequence of the shift register circuit 20 is shown in FIG. 3.
Please further refer to FIG. 4. FIG. 4 is a schematic diagram of a conventional flip-flop circuit 40. As shown in FIG. 4, the flip-flop circuit 40 generally includes two stages of latch circuit 41 and 42. When the clock signal CLK is logic low, the flip-flop circuit 40 stores the logic level of the input signal DIN into the first stage latch 41, and the second stage latch 42 is disabled. However, when the clock signal CLK is converted from logic low to logic high, the first stage latch 41 is then disabled while the second stage latch 42 is activated to output data stored by the first stage latch 41. In such a situation, when unexpected impulses exist in the clock signal CLK that caused by noise interference, the shift register circuit 20 is liable to operate in error.
For example, please refer to FIG. 5. FIG. 5 illustrates how noise interference causes error operation of a conventional shift register. As shown in FIG. 5, when the clock signal CLK has a downward unexpected impulse, each flip-flop of the shift register may perform data latch and output operation according to the error noise impulse, causing the shift register to output incorrect pulse signals. However, since the LCD panel needs to rely on a variety of signals for operation, coupling effects between signals, such as electromagnetic coupling for example, often induce noises to the clock signal of the driving circuit, causing the shift register to operate in error, so as to abnormally display images on the LCD panel.
Therefore, how to prevent the clock signal from noise interference is an important issue when designing the driving circuit of the LCD.